Manufacturing semiconductor devices includes forming multiple devices or dies on a single semiconductor wafer. Die cutting, dicing, or singulation of the semiconductor wafer separates the multiple dies into discrete portions of the semiconductor wafer, with each portion of the wafer containing one of the dies.
Between the multiple dies on the semiconductor wafer are spaces for cutting the semiconductor wafer, such as by a saw, without damaging the dies. The spacing is also referred to as a scribe line. To maximize the area of the semiconductor wafer used in forming the devices, the width of the scribe line is formed as small as possible. However, the dimensions and the structure of the scribe line can cause delamination and/or cracking of the semiconductor wafer during a dicing process, particularly for brittle ULK technologies. It is known that discrete dummy structures that are connected vertically through vertical interconnect accesses (VIAs) and that are located in the scribe lines can minimize damage during dicing processes. However, such laterally discrete dummy structures in each layer can also be a crack propagation path.
A need, therefore, exists for methodology enabling formation of a scribe line between dies within a semiconductor wafer that does not suffer from delamination, cracking, and/or other issues during separation of the dies and the resulting device.